Back in April of 2023 we announced the AMD Alveo™ MA35D media accelerator to much fanfare, if you’re not yet up to speed on that, or you just want to relive the excitement, you can find the announcement here. After showcasing our newest accelerator at the NAB (National Association of Broadcasters) Show, we were able to realize the culmination of years of learnings, planning, and good old-fashioned hard work in launching the industry’s first 5nm ASIC-based media accelerator, purpose-built for interactive streaming at scale. With that we are pleased to announce the expansion of the Alveo Media Acceleration portfolio alongside the AMD Alveo™ U30. With the launch and early-access program now behind us, it’s time to really get started.

AMD is excited to announce the Spartan™ UltraScale+™ FPGA, our newest cost-optimized FPGA. Ideal for cost-sensitive applications requiring low power and high I/O, this new family targets a wide range of industries, including Industrial, Robotics, Smart City, Computer Vision, Healthcare, Video and Broadcast, and more.

Support for Spartan 6 FPGAs is extended through at least 2030 and includes all speed and temperature grades.

AMD technology is helping Cornell University unlock discoveries in the world of physics.

Dr. Lawrence Gibbons, a professor in the department of physics at Cornell University, has had an interest in science from a very early age. A self-proclaimed "Trekkie," Gibbons says he was really fascinated by physics as a child and was reading about black holes in early junior high. "I was interested in physical phenomenon and started pursuing it," he said.

AMD unveils the Alveo™ X3 series network cards designed for first turnkey deployment and custom implementation paths for low latency trading applications.

Building on the success of the AMD Zynq™ UltraScale+™ MPSoCs and AMD Artix™ UltraScale+ FPGAs, AMD is extending the UltraScale+ family with two new devices.  

The new AU7P and ZU3T devices are based on the 16 nm FinFET process for low power, high performance-per-watt, and small form factor applications. These small, low cost, and low power entry points to the programmable logic (PL) transceiver-based UltraScale+ family offer improved features such as high IO-to-logic density, UltraRAM, DSP, etc. 

The gaming console market is currently worth $13B according to ABI Research, and is dominated by suppliers such as Microsoft, Nintendo and Sony. An activity that was once limited to an individual home has now morphed into cloud-based interactive gaming with a constant increase in computational capability of the processors that form the brain of the console. Online smartphone and tablet games continue to nibble away at the serviceable market (SAM) of portable consoles. Not to be outdone, the larger game console OEMs (Microsoft and Sony) continue to invest in purpose-built processors using the most complex modern technology capable of higher resolution (4K) with advanced wireless connectivity (Bluetooth, WiFi), 3D gaming with features such as 3D localization, Augmented Reality (AR) and Virtual Reality (VR) capabilities, and investments or partnerships with premium e-sports outlets.

The COVID-19 outbreak has severely limited industry travel since 2020, but Xilinx has continued to present new Radio IP for Zynq® UltraScale+™ MPSoC and RFSoC devices at many virtual events. I know that it can be difficult to attend an entire virtual event due to daily work commitments; to make these events more accessible, Xilinx has video recordings available online.

Let me highlight recent Xilinx video demos presented at the International Microwave Symposium (IMS) 2021 and Mobile World Congress (MWC) 2021.

In orbital applications involving programmable logic devices, there is a risk of a single event upset (SEU) in the configuration memory caused by high-energy charged particles. When memory cells essential to the design are affected by an SEU, the upsets can affect the application functionality. Additionally, an SEU in the FPGA control circuitry can cause a single event functional interrupt (SEFI). Because both events are undesirable, a method for resumption of normal and expected functionality is required.

Last year, Xilinx has added a one-of-a-kind speed-demon to our production-proven Virtex® UltraScale+™ HBM FPGA family, VU57P, which integrates 16GB of HBM DRAM with 58G PAM4 transceivers, our high-performance FPGA fabric, and high-speed connectivity hard IP. The production version of the VU57P devices are shipping now.