In the ever-changing world of professional multimedia, the move to Ethernet and IP networking is one of the most important trends that is fundamentally transforming the industry. Audio and video (AV) are no longer constrained by point-to-point connectivity.
ISE 2023, the world’s largest AV tradeshow, takes place in Barcelona from Jan 31st to Feb 3rd. This year the AMD Pro AV, Broadcast and Consumer team will be located at Hall 5, Stand 5D300, alongside strategic customers and partners, demonstrating adaptive computing solutions designed to enable real-time 4K and 8K-ready applications; transport any media over any network; and support intelligent AV solutions.
Building on the success of the Zynq™ UltraScale+™ MPSoCs and Artix™ UltraScale+ FPGAs, AMD is extending the UltraScale+ family with two new devices. The new AU7P and ZU3T devices are based on the 16nm FinFET process for low power, high performance-per-watt, and small form factor applications. These small, low cost, and low power entry points to the programmable logic (PL) transceiver-based UltraScale+ family offer improved features such as high IO-to-logic density, UltraRAM, DSP, etc.
Vitis HLS provides pragmas that can be used to help optimize the design and improve throughput performance. The PERFORMANCE pragmas apply to loops and loop nests in order to determine the performance.
Performance pragmas can now automatically infer lower-level optimizations, such as unroll, pipeline, array_partition, and inline pragmas. The ability to specify throughput requirements at the loop level reduces complexity as users do not have to figure out partitioning, pipelining and unrolling needs, thus making the HLS tool easier to use.