Did you catch the recent launch of our new Artix® UltraScale+™ FPGA and Zynq® UltraScale+ MPSoC products?  These new devices represent a new level of compute density perfect for compact edge devices. And with new InFO packaging from TSMC, they offer up to 60% smaller and 70% thinner options compared to existing products. 

Next-generation network security implementation is under constant evolution and going through an architectural shift from lookaside implementation to inline implementation. With the beginning of 5G deployments and multifold increase in the number of connected devices, the architecture for security implementation needs to be re-visited and modified. 5G throughput and latency requirements are changing the access networks while requiring the need for extra security. This evolution is driving the following changes for network security

AMD Kria SOMS help users achieve design simplicity. 

Many industries continuously demand higher bandwidth capacities than today's technologies and form factors can support. The demand is for a more efficient, pervasive computing platform that scales beyond what CPU and GPU technologies can reach.

Xilinx is introducing two Versal™ ACAP evaluation kits: Versal AI Core series VCK190 evaluation kit and Versal Prime series VMK180 evaluation kit. Both the VCK190 and VMK180 evaluation kits come with the same set of accessories and have similar onboard interfaces. The main difference between the kits is the target device. The VCK190 evaluation board uses the Versal AI core series VC1902 ACAP, which includes an array of AI Engines while the VMK180 evaluation board uses the Versal Prime series VM1802 ACAP. 

The COVID-19 outbreak has severely limited industry travel since 2020, but Xilinx has continued to present new Radio IP for Zynq® UltraScale+™ MPSoC and RFSoC devices at many virtual events. I know that it can be difficult to attend an entire virtual event due to daily work commitments; to make these events more accessible, Xilinx has video recordings available online.

Let me highlight recent Xilinx video demos presented at the International Microwave Symposium (IMS) 2021 and Mobile World Congress (MWC) 2021.

As we enter the era of heterogeneous compute, where different processing engines in a single application take us to that next level of performance and efficiency, debug and trace tools have to evolve to keep up with devices.

In orbital applications involving programmable logic devices, there is a risk of a single event upset (SEU) in the configuration memory caused by high-energy charged particles. When memory cells essential to the design are affected by an SEU, the upsets can affect the application functionality. Additionally, an SEU in the FPGA control circuitry can cause a single event functional interrupt (SEFI). Because both events are undesirable, a method for resumption of normal and expected functionality is required.

Yesterday, as I was sitting in traffic on my way home from work and looking at the long lines of cars surrounding me, I had an interesting thought. Every car I could see was loaded with semiconductor products—in engine sensors, infotainment systems, smartphones, laptops, and even watches. Compared to a decade or two ago, the proliferation of modern computing power has changed nearly every aspect of our lives. 

One of main reasons that our customers choose Xilinx is because of performance-per-watt advantage. Key applications for power include aerospace & defense, industrial scientific & measurement, automotive, and enclosed environmental installations.