This article was originally published on December 7, 2018.
Editor’s Note: This content is contributed by David Brubaker, Sr. Product Line Manager - Zynq UltraScale+ RFSoCs
I recently attended Xilinx Developer Forum (XDF) in San Jose and there were several interesting updates regarding Xilinx’s innovative Zynq® UltraScale+™ RFSoC products. Here are some highlights for those who missed it.
Versal Portfolio
First, Victor Peng’s keynote presentation on the Versal™ portfolio mentioned the Versal AI RF series, which includes both AI Engines and RF sampling converters. This series uses AI Engines to implement most Digital Front End (DFE) functions at lower power compared to traditional programmable logic. More importantly, Victor’s keynote affirms Xilinx is committed to the RF data converter integration roadmap for the long term.
New Zynq UltraScale+ RFSoC Development Kit by Avnet
Next, there were interesting announcements/demos with Zynq UltraScale+ RFSoCs. Avnet announced the Avnet Zynq UltraScale+ RFSoC kit using the Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit and a new Qorvo 2x2 LTE Band-3 RF front end card along with Mathworks software. The Avnet RFSoC kit provides a native connection to the MATLAB 5G toolbox and Simulink software so that system and algorithm engineers can run radio-in-the-loop co-simulation, over-the-air testing, and direct-RF sampling without an external RF mixer. The Xilinx Vivado® System Edition with system generator DSP enables a quick and flexible development environment. This first turn-key development kit enables full simulation for 5G algorithm without additional hardware and software requirements.
Software Defined Radio with RFSoC and Python Productivity for Zynq (PYNQ)
The University of Strathclyde presented a demo showing a software defined radio (SDR) design using the PYNQ open source framework to implement a full TX and RX radio. This is an example of true SDR as an entire TX and RX radio using open source. PYNQ also enables the Zynq UltraScale+ RFSoC ZCU111 Evaluation Kit to be easily programmed in Jupyter Notebook using Python. Using Python and libraries, developers can exploit the benefits of programmable logic and microprocessors in Zynq devices.
Zynq UltraScale+ RFSoC Solutions at XDF
David Brubaker, Zynq UltraScale+ RFSoC product line manager, and Glenn Steiner, Sr. Manager – SoC solution marketing, presented an update to the Zynq UltraScale+ RFSoC product, showing key use cases for the RFSoC and presented new tools for the Zynq UltraScale+ RFSoC and evaluation kit.
The main use cases presented were: 1) Wireless Remote Radio Unit (RRU), 2) Remote PHY for cable modem, and 3) Highly integrated T/R module for A/D applications. These use cases highlight the benefits of Zynq UltraScale+ RFSoC, which provides lower power and smaller footprint than comparable discrete solutions.
Lastly, they presented an overview of the recently released RF Data Converter Evaluation Tool, which runs with the ZCU111 Evaluation Kit, providing designers a LabView-based GUI to configure and analyze the ADC/DACs on the Zynq UltraScale+ RFSoC. With this tool the DAC and ADC can be put in loop-back enabling Digital to RF (DAC) followed by RF to Digital (ADC) connections, demonstrating both frequency and time domain analysis.
To download the content at XDF, visit https://www.xilinx.com/content/dam/xilinx/imgs/developer-forum/2018-silicon-valley/Embedded-Software...
To learn more about Zynq UltraScale+ RFSoC, visit https://www.xilinx.com/products/silicon-devices/soc/rfsoc.html