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Sharing Our Know-How to Make Your Products Safer

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This article was originally published on July 1, 2019.

Editor’s Note: This content is contributed by Michael Zapke, Product Marketing Manager - Industrial, Core Vertical Markets

 

What do you associate with the word “logic”? If you are a “Trekkie,” you’ll probably respond with Vulcan philosophy: It’s the absence of everything that influences a result in an unpredictable way.

Logic is the foundation of Xilinx, and adaptability of logic makes our approach unique. FPGAs as well as SoCs with programmable logic come with an architecture that’s made for determinism. Xilinx’s Center of Excellence for Safety and Security continuously innovates ways to optimize Functional Safety designs with superior device architectures, design flows, and processes. Sharing the results of this innovation generates a good enough reason for a two-day get together with experts from leading companies who create functionally safe products for industrial automation, automotive, transportation, energy, and aerospace & defense.

Applicable Safety StandardsApplicable Safety Standards

 

200+ users followed Xilinx’s call to join the 2019 Functional Safety Working Group (FSWG) events in Longmont, Colorado and Munich, Germany. In our third year of hosting FSWGs, each of these two events were vivid and interactive exchanges between Xilinx customers, partners, and industry authorities. Xilinx architects, field application engineers (FAEs), and strategy owners from Xilinx’s market segments (industrial, vision, healthcare & sciences, automotive, and aerospace & defense) were there to teach, learn, and share. Xilinx’s Center of Excellence for Safety and Security guided the participants through the sessions with in-depth presentations and previewed information about innovations that will be released later this year - under NDA, of course.

This time it was a journey through all aspects of Functional Safety Design—from Quality Management over Certification, a Zynq® UltraScale+™ MPSoC Safety Mechanism Deep Dive, a tutorial on FMEDA calculations, Firmware, and Xilinx roadmap. We also didn’t forget security, which we dedicated a special session to. Highlights included walk-through labs to illustrate how the isolation of functions in programmable logic and processing system works. The events concluded with Functional Safety Design examples and a review of the Xilinx Functional Safety Solutions roadmap.

FSWG in Munich, presented by Jim Wesselkamper, Karsten Trott, Krimo Semmoud, Paul Levy, Pramod Bhardwaj, Oscar Ballan (from left to right)FSWG in Munich, presented by Jim Wesselkamper, Karsten Trott, Krimo Semmoud, Paul Levy, Pramod Bhardwaj, Oscar Ballan (from left to right)

 

The venues and structure of these events promoted direct discussions with our customers, including evening socials, to make sure participants could informally ask questions or discuss their particular needs or challenges.

Over 140 people in audience at the FSWG Munich presentation about Single Event Upset MitigationOver 140 people in audience at the FSWG Munich presentation about Single Event Upset Mitigation

 

Sign Up for Upcoming Events

The Functional Safety Working Groups events in the late spring/early summer and Xilinx Security Working Group events in the fall have now become highly anticipated fixtures in our customer and partner calendars. These events continue to grow in size every year, as our repeat participants are joined by new customers and partners. We are excited that the next events are not far away: The 2019 Security Working Group (XSWG) events in October through December will be held in San Jose CA, Longmont CO, Washington DC, and Munich, Germany (see: https://www.xilinx.com/products/technology/design-security.html#workingGroup).