Ready for 8K Part 3 - Versal™ Adaptive SoCs for 8K Processing

amd_adaptivecomputing · ‎08-03-2023

Editor’s Note: This content is contributed by Rob Green, Senior Manager - Pro AV, Broadcast, and Consumer.

Versal™ Adaptive SoCs are Ready for 8K Processing

Figure 1: Versal Device Diagram

The adoption of 8K video creates new challenges for designers of equipment that need to ingest, process, and transmit 8K video.

To ingest and transmit 8K video, interfaces must deliver four times the bandwidth of their 4K predecessors, resulting in interfaces with more data lanes, higher speeds, or both. AMD Versal™ adaptive SoCs (System-on-Chips) are well suited to such interfaces (those with line rates of 20 Gbps or more) because they offer GTY or GTYP transceivers that are capable of rates up to 32 Gbps, which is a capability that was limited to only larger devices in the previous generation of adaptive SoCs. Examples of these high-rate interfaces include DisplayPort™ 2.1 and SMPTE ST 2110:

DisplayPort 2.1 introduces the UHBR20 line rate, or 20 Gbps on up to four lanes.
ST 2110 relies on 25G Ethernet for the transport of lightly compressed 8K, or 100G Ethernet to transmit uncompressed 8K, the latter of which often uses four lanes running at 25 Gbps as an interface to an optical transceiver module.

To complement these higher-speed transceivers, all Versal devices also integrate one or more of the following protocols:

MRMAC blocks which can implement 4x25G Ethernet or 1x100G Ethernet MACs, including the resource intensive FEC (forward error correction) function, thus freeing up programmable logic resources for other functions.
PCIe® Gen4 blocks that enable the capture of a single channel of uncompressed 8K video into workstations using a 4-lane interface. Up to four channels of uncompressed 8K video can be ingested over PCIe Gen4x16, a capability made possible by most Versal adaptive SoCs.

When it comes to processing 8K video, the Versal family also rises to the challenge thanks to several innovative features:

The frame buffering capabilities made possible by hardened (LP)DDR4 memory controllers. The number of controllers scales with the device density from one to four. When configured as 64-bit DDR4-3200, each Versal memory controller offers 33% more bandwidth than previous-generation adaptive SoCs.[1]
The Network-on-chip, which spans the entire Versal device. Thanks to this distributed approach, multiple video clients located all over the programmable logic region of the device can access the video frame buffers in external memory while minimizing the use of logic resources and routing. The overall bandwidth of the NoC and memory controller subsystem is sufficient for four or more channels of uncompressed 8K video frame buffering in Versal devices with two or more memory controllers.
An almost 4x increase in UltraRAM which is perfectly aligned with the 4x increase from 4K to 8K, and larger device densities enable more processing functions to be packed into a single device.[2]

In summary, thanks to the high-speed transceivers, integrated multi-rate Ethernet MACs, Gen4-compliant PCIe blocks, hardened DDR4 controllers, and network-on-chip capabilities, Versal Prime adaptive SoCs are a great fit for anyone looking to be ready for 8K.

References

[1] This is based on Zynq Ultrascale+ PS DDR4 controller which supports DDR4-2400 as per table 30 in DS925 v1.23 and Versal Prime Memory Interface controllers which supports DDR4-3200 as per table 73 in DS956 v1.6

(3200-2400) / 2400 = 33% increase

[2] This is based on the largest Zynq Ultrascale+ (XCZU19EG with 128 UltraRAM blocks as per table 3 in DS891 v1.10) and a midrange Versal Prime device (XCVM1802 with 463 UltraRAM blocks as per table 6 in DS950 v1.17)

463 / 128 = ~4

DisplayPort ™ and the DisplayPort logo are trademarks owned by the Video Electronics Standards Association (VESA ®) in the United States and other countries.

PCIe® is a registered trademark of the PCI-SIG Corporation.