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AMD and Xilinx Demonstrate Converged ROCm Runtime Technology Preview at SC20

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This article was originally published on November 18, 2020

This week at the SC20 virtual conference, Xilinx is presenting a technology demonstration showcasing the integration of Xilinx Alveo accelerator cards with the AMD ROCm™ open software platform. The technology preview builds on AMD leadership in high-performance computing technology, specifically leveraging user-mode queueing and shared-virtual memory, to offer direct, low-latency dispatch of work on Alveo accelerators.

Alveo accelerators are used to deliver compute, networking, and storage acceleration in high-performance computing applications. Xilinx devices form a critical role in accelerating infrastructure and specialized compute, working alongside GPUs and CPUs to power many of the world's most demanding workloads such as machine learning inference, real-time video transcoding, and database analytics.

The SC20 technology demonstration extends the capability of Alveo cards through support for PCIe Address Translation Service (ATS) and user-space queues and events. These services allow Alveo accelerators to access system and GPU memory using a common virtual address space. The runtime controls the visibility and safely isolates memory access per user and implements dispatch and synchronization as efficient user-mode operations.

These new hardware features enable a deep and pervasive integration for Xilinx FPGAs with the AMD ROCm open software platform creating a foundation for the seamless integration between AMD Instinct™ GPU accelerators and our Alveo accelerators in compute, networking, and storage solutions.


(Standalone Software Stacks: AMD ROCm and Xilinx Vitis software)


(Technology demonstration: Converged runtime for CPU, GPU, FPGA)

The technology demonstration showcases:

  • Unified discovery and reservation of AMD and Xilinx accelerators using a converged runtime in the AMD ROCm open software platform;
  • Dispatch of work to Alveo accelerators using the same user-space queues used for low-latency work dispatch to AMD Instinct accelerators;
  • Peer-to-peer synchronization between GPU and FPGA devices; and
  • Access to memory on GPU, CPU, and FPGA devices using a common, shared virtual address space

A video presentation of the joint technology demonstration is available in AMD’s SC20 virtual booth. Watch the video below or at our YouTube page.

We’re excited about the opportunities unlocked by the combination of AMD CPUs, GPUs, and Xilinx FPGAs. Today’s demonstration is an essential first step toward pervasive exascale compute solutions that leverage the strengths of the two platforms in high-throughput floating-point compute and optimized networking, respectively.

AMD, the AMD Arrow logo, AMD Instinct, ROCm, and combinations thereof are trademarks of Advanced Micro Devices, Inc.