Showing results for 
Search instead for 
Did you mean: 

Unleashing Computational Power with the New AMD Alveo™ V80 Compute Accelerator

For large-scale data processing, optimal performance depends not only on raw computational power but high memory bandwidth. As such, the new AMD Alveo™ V80 compute accelerator is architected for memory-bound applications with large data sets that demand FPGA hardware adaptability for workload optimization. Now shipping in volume production, the Alveo V80 accelerator card offers up to double the bandwidth and compute density of previous generation cards1 and is paired with a simplified development flow for FPGA designers using the AMD Vivado™ Design Suite.


Figure 1: Alveo V80 Compute Accelerator


Coming in a full-height, ¾ length (FH¾L) form factor, the new card is powered by an AMD Versal™ HBM adaptive SoC, featuring 2.6M LUTs of FPGA fabric, 10,848 DSP slices of compute, and 820 GB/ of memory bandwidth to help overcome performance bottlenecks.

With up to double the logic density, up to double the memory bandwidth, and up to 4X the network bandwidth of its predecessor, the AMD Alveo U55C compute accelerator,1 the Alveo V80 enables powerful compute clusters while optimizing the number of cards, servers, and rack space.

Purpose-Built, Network-Attached Accelerator for Big Data Sets and Memory-Intensive Workloads

The hardware flexibility of the Alveo V80 card allows for broad application across diverse and custom workloads. As a 4x200G network-attached accelerator, the card can process large volumes of incoming data in real-time, bypassing the limitations of PCIe® connectivity encountered with GPUs.


Figure 2: Accelerating Compute-Intensive, Memory-Bound Workloads at Massive Scale



The Alveo V80 accelerator can scale to hundreds of nodes over Ethernet for compute clusters, making it ideal for a range of HPC applications including genomic sequencing, molecular dynamics, and sensor processing. For network security, the built-in 400G cryptographic engines and 600G Ethernet hard blocks, coupled with FPGA hardware flexibility make the Alveo V80 accelerator suited for line-rate packet inspection and AI-enabled anomaly detection.

The accelerator is also ideal for computational storage and data analytics, with the ability to integrate compression and query acceleration on the same card, increasing effective storage capacity while accelerating time to insights. Additionally, it is well suited for various FinTech applications including strategy backtesting, options pricing, and financial modeling and simulation.

Case Study: A Leap in Compute for Astrophysics

The Commonwealth Scientific and Industrial Research Organization (CSIRO)—Australia’s national research organization—is involved in constructing the world’s largest radio astronomy antenna array, which currently incorporates 420 Alveo U55C accelerator cards, processing radio waves to study the early universe and explore galaxy evolutions.


With the Alveo V80 accelerator, CSIRO plans to reduce footprint, cost, and streamline the number of cards needed by up to 66% while addressing new signal processing tasks from the telescope’s 131,000 antennas. This leap in compute per card offers a projected TCO decrease of up to 20%, given the potential reduction in cards, servers, rack space, and power.2

“We first adopted the Alveo product line due to its ability to process massive amounts of sensor data in real-time,” said Grant Hampson, Research Engineer, Space and Astronomy Division at CSIRO. “For our next generation beamformer and correlator, reducing TCO will be imperative. The Alveo V80 accelerator is a technology step-function increase over previous the prior generation Alveo U55C cards, delivering a compact, power-efficient solution in a cost-effective footprint2.”


Figure 3: AMD Alveo V80 Accelerator Card for Estimated Sensor Processing and TCO Savings2


See End Note: ALV-162

Simplifying Development for FPGA Designers

The Alveo V80 accelerator card is fully enabled for traditional hardware developers through the Alveo Versal Example Design (AVED), now available on GitHub. AVED simplifies hardware bring-up using traditional FPGA and RTL flows and is based on the familiar Vivado tool flow. The example design provides an efficient starting point using a pre-built subsystem implemented on the AMD Versal adaptive SoC and specifically targeting the Alveo V80 accelerator card.

At the system level, the Alveo V80 compute accelerator simplifies system integration and provides a fast path to production. By using a pre-validated deployment card, design teams can bypass PCB integration, inventory management, and product lifecycle management tasks.

Shipping Now

Alveo V80 is in volume production and available now from AMD and authorized distributors. Visit to learn how the new accelerator can redefine compute for your own infrastructure, read the product brief and data sheet for detailed specifications, or reach out to a specialist for more information.


1: Based on published specifications in the publicly available AMD Alveo Product Selection Guide, as of April 2024. (ALV-13). 

2: Based on independent "Early Access" performance and cost analysis estimates by CSIRO in October 2023, comparing an existing implementation of 420 Alveo U55C accelerator cards vs. an expected implementation of 140 AMD Alveo V80 accelerator cards. An estimated Total Cost of Ownership was calculated over a three-year period and includes the projected costs of power and cooling OPEX. All performance and cost savings claims are estimates provided by CSIRO and have not been verified by AMD. Performance and cost benefits are impacted by a variety of assumptions and variables and are subject to change based on system configuration and other factors. Results are specific to CSIRO and may not be typical. For additional details, see Figure (3) (ALV-16).