This article was originally published on April 6, 2022.
Editor’s Note: This content is contributed by Ehab Mohsen, Sr. Product Marketing Manager.
If you’re developing an intelligent edge application that needs processing power in an ultra-compact form factor—we have news for you: the Zynq® UltraScale+™ ZU1 MPSoC is now shipping in all packages including the Ultra-Compact InFO Packaging.
That means it’s time to reach out to your local FAE or salesperson to get started.
The ZU1 MPSoC is the smallest, lowest power, and most cost-optimized MPSoC in the Zynq UltraScale+ portfolio, offering the highest I/O density and DSP compute density in the family.
We optimized the resource mix of the ZU1 device but retained all the capability of the proven UltraScale™ architecture itself. This includes the powerful Arm® processing subsystem for analytics and complex decision making, the ability to connect to any sensor or interface, adaptable hardware for nearly any function, and the ability to customize your on-chip memory hierarchy to eliminate performance bottlenecks, among other capabilities.
Hardware Adaptable for a Breadth of Edge Markets
The ZU1 device is ideal for miniaturized, compute-intensive edge applications in industrial and healthcare IoT systems, including embedded vision cameras, hand-held test equipment, as well as consumer and broadcast application such as AV-over-IP 4K- and 8K-ready streaming.
But the application possibilities don’t stop there! The ZU1 MPSoC is hardware adaptable. While the Arm subsystem is ideal for analytics and real-time processing, the programmable logic can take on nearly any processing or connectivity function, including:
- Sensor fusion
- Vision and video processing
- AI inference
- Connectivity to a breadth of interfaces and protocols (up to 6Gb/s)
One of the most important optimizations we did for the ZU1 device was right-sizing the logic density to meet the power budgets of miniaturized applications. The ZU1 device delivers 40% less static power in the programmable logic compared to the next largest device in the family (ZU2 device) but with only 20% less programmable logic.
Couple that with deep-sleep mode (available in all Zynq UltraScale+ MPSoCs) where the device can operate under 200 nanowatts, and you have a highly capable platform for the most power-limited and thermally-constrained environments.
Ultra-Compact InFO Packaging
Compute density matters for intelligent edge and endpoint applications. That’s why one of the most notable innovations for this device is the new InFO package, which allows us to provide substantial DMIPS per area and compute density in an ultra-compact 9.5x15mm form factor.
InFO stands for Integrated Fan-Out and was developed by TSMC. This technology eliminates the substrate from the traditional electronic package as shown in Figure 4, enabling thinner and smaller size, lower power, and higher interconnect density. Traditionally used for high-performance mobile applications, AMD-Xilinx is now leveraging this technology for its adaptive platforms, including the Zynq UltraScale+ ZU1 / ZU2 / ZU3 MPSoCs and Artix® UltraScale+ FPGAs.
In the case of Zynq UltraScale+ MPSoCs, this package uses 60% less area and is roughly 70% thinner than a standard Zynq UltraScale+ device as shown below. It also offers better thermal dissipation and higher signal integrity, all without sacrificing the processing capability of the Zynq UltraScale+ MPSoC.
A Scalable Zynq UltraScale+ MPSoC Portfolio
System vendors want to be able to scale a single platform for low-end to high-end product offerings. Not having to redesign their IP, adopt new development flows, re-certify code, or re-qualify for safety compliance translates into faster development and time to market. With over 20 device offerings, the Zynq UltraScale+ MPSoC portfolio enables them to do just that—design once then reuse for product derivatives. The addition of the ZU1 device now gives system vendors even greater scalability at the low-end.
With a logic density of 81K system logic cells, the ZU1 device is available in both dual-core and quad-core Arm Cortex®-A53 configurations, with and without the Arm Mali™ GPU (which is commonly used for 2D/3D visualization and graphical overlay). See the product selection guide for more details.
Available Now
In short, the ZU1 MPSoC packs all the architectural features of the Zynq UltraScale+ MPSoC family, making it code and IP compatible and extending the portfolio’s scalability. The main differences are reduced logic resources for greater power efficiency, optimized I/O ratio for edge connectivity, optimized DSP-to-logic ratio for higher compute density, and new InFO packaging for ultra-compact edge and endpoint applications.
But perhaps the best thing going for the ZU1 device is it’s now available for you to start designing it into your next-generation edge application. Contact your local sales representative or visit our contact sales form to inquire about device pricing and schedules