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Supercharge your memory-bound compute acceleration with Xilinx Virtex UltraScale+ HBM FPGAs

Cindy_Lee
Staff
Staff
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This article was originally published on May 20, 2019.

 

Many application domains that were bottlenecked in the past by insufficient compute power have been significantly advanced by the development of heterogeneous computing accelerators like the UltraScale™ devices, UltraScale+™ devices, and Versal™ ACAPs. Examples of popular heterogeneous compute-accelerated workloads in today's Data Centers are artificial intelligence, live video transcoding, and genomic analytics, to name just a few. Virtex UltraScale+ HBM FPGAs provide unparalleled adaptability and compute acceleration to modern data-center workloads.

 

Virtex UltraScale+ HBM FPGAs are in production

Xilinx’s HBM solution takes advantage of silicon stacking technologies to place the FPGA and the DRAM beside each other in the same package. The result is a co-packaged DRAM structure capable of multi-terabit per second bandwidth. This provides system designers with a significant step function improvement in bandwidth, compared to other memory technologies.

Virtex UltraScale+ HBM FPGAs are built upon the same building blocks used to produce the Xilinx 16nm UltraScale+ FPGA family, in production since 2016, by integrating a proven HBM controller and memory stacks from Xilinx supply partners. With a Virtex UltraScale+ HBM FPGA, the amount of external DDR4 used is a function of capacity requirements, not bandwidth requirements. This results in using far fewer DDR4 components, saving designers both PCB space and power. In some cases, no external memory is needed.

Virtex UltraScale+ HBM FPGAs, in full production since April 2019, have greatly improved memory bandwidth—up to 460GB/s delivered by two stacks of HBM Gen2 memory. Pairing one or two stacks of HBM2 with various sizes of FPGA logic (up to 2.85 million logic cells) and DSPs (up to 9,024 DSP48E2 slices delivering 28.1 peak INT8 TOPs) allows the designer to choose one of the new Xilinx HBM devices based on their requirements.

For more information on how Xilinx Virtex UltraScale+ HBM devices are addressing the demand for dramatically increased system memory bandwidth while keeping power, footprint, and cost in check, check out this white paper.

 

Designed for Data Center and Compute Acceleration

Many other Data Center workloads can benefit significantly from HBM. For example, a SmartNIC use case was introduced in a Xilinx white paper last year, and Xilinx's partner also published their use case using an HBM-enabled device-acceleration FFT.

With the trends of heterogeneous computing acceleration moving forward in Data Centers together with innovations in computing device technology, there are urgent needs for high-performance memory systems like HBM attached close to the compute units. The Virtex UltraScale+ HBM devices from Xilinx open new potentials and raise computing acceleration to the next level.

This white paper contains two use cases as examples—deep learning and database acceleration—and explains how a balanced Xilinx compute accelerator system with HBM Gen 2 memory delivers high-impact compute acceleration solutions with optimal flexibility, efficiency, and performance.

 

If the Virtex UltraScale+ HBM FPGAs can help you to solve memory bandwidth and capacity issues, visit the Virtex UltraScale+ HBM FPGA page.

About the Author
Cindy Lee is the Sr. Product Marketing Manager in the Adaptive and Embedded Computing Group (AECG) at AMD. In this role, she leads content creation, positioning, and messaging of all AECG products, such as FPGAs, adaptive SoCs, and design tools. Cindy has over 20 years of technology industry experience across several engineering and marketing organizations.