Hi all,
Does any have any technical info on how to set (i.e. Write) the USERCODE register in a XC9500 series Xilinx CPLD?
I can read CHIPID and USERCODE from the CPLD but I have no details on how to set the USERCODE.
I imagine there is specific instruction register code for this but I can't see it in any BDSL file online. Also it isn't buried in the original CPLD SVF files either, so I'm not sure how the current Win32 Xess software tools are setting this register.
I am hoping there are some AMD \ ex Xilinx staffers that might have some old datasheets \ specifications for these devices.
I am trying to resurrect an old Xess Corp Spartan 3 FPGA development system - for which I have managed to port the original Win32 software over to 64bit Linux so that I can access the CPLD \ FPGA chips via a parallel port. The only thing I can't do is write this usercode register in the XC9572.
I know its possible because the old Win32 Xess tool does this, but some ancient source code revision of these tools I found on Sourceforge hasn't got this feature.
Pointers in the right direction gratefully accepted
