Hi
when i am trying to generate the bitstream with the GUI i am able to succeed but when i generating the bitstream with TCL file in CLI i am facing the below error.
Try help in fixing this issue.
Is there any way to optimize the number of DSP slice utilization.
ERROR: [DRC UTLZ-1] Resource utilization: DSP48E1 over-utilized in Top Level Design (This design requires more DSP48E1 cells than are available in the target device. This design requires 221 of such cell types but only 220 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.)
