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ashleygal4
Journeyman III

Vivado 12-4739 create_clock:No valid objects found for '-objects [get_ports clk100Mhz]'.

Hi, I am working on a (ADC) analog to digital converter code using the IP Source wizard. I configurated the IP Source with a DCLK Frequency (Mhz) of 100 and ADC Conversion Rate (KSPS) of 1000 and Acquisition Time(CLK) of 4 to prevent issues regarding the timing. But when I run the synthesis, I get an error in the synthesis saying: 

[Vivado 12-4739] create_clock:No valid object(s) found for '-objects [get_ports clk100Mhz]'. 

and later on: [Common 17-55] 'set_property' expects at least one object., in every I uncommented in the xdc. 

I don´t understand why this is an error I am receiving. I would appreciate any help.

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There is a separate dedicated xilinx support site, better to ask at https://www.xilinx.com/support.html

 

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