General Discussions

[vamsikvv]

Hi,

We are trying to know the what will be speed of each Pin in the Virtex Ultrascale+ FPGA Family's,4

We are willing to connect Single ended CMOS Logic pins.

Please let us know what is the max speed that Each IO pin can give in all Banks.

Regards

Vamsi Krishna

[goodplay · Accepted solution]

Probably better to ask at https://www.xilinx.com/support.html