Server Processors

[heyhd9475]

I found a instreresting thing recently is that when I use the AOCC-3.2.0 compile some program, it can vectorized some loop but LLVM-15 cannot, when I use the flags '-Rpass(-analysis/-missed)=loop-vectorize' and '-mllvm -debug-only=loop-vectorize' to explore the reason, I get the output as following:

vectorized loop by MELV with VF: 16 UF: 1

but the 'MELV' didn't occur in LLVM-15 output, so I wanna know what the MELV is, I guess the M is memory?

[dipak]

Thanks for posting it. 

For AOCC related support, the AMD Server Gurus community is the right place to post any query or issue, so I am moving this post there.

Thanks.

[heyhd9475]

okay, thanks a lot

[santosh_zanjurne]

Hi heyhd9475, Multi-Exit Loop Vectorizer (MELV) is an optimization introduced by AOCC Compiler to vectorize the loops which have multiple exits from the loop.

Regards,

Santosh

[heyhd9475]

Hi santosh, 

is there more detailed information about this technology?

thanks a lot

[santosh_zanjurne · Accepted solution]

Hi heyhd9475, in addition to normal exit from the loop after executing the maximum possible number of iterations (maximum trip count), loops with early conditional exit - based on the result of a memory load - can be vectorized my MELV.  There was some work done on llvm.org also - refer public-notes/multiple-exit-vectorization.rst at master · preames/public-notes (github.com) - but its...

Also, I will raise a ticket to make more compiler documentation available publicly.

[santosh_zanjurne]

Hi heyhd9475, Can you share more information like what benchmark you are experimenting this on?  And you can try our latest AOCC release 4.0.  AMD Zen Software Studio | AMD

[heyhd9475]

Hi santosh, I just use AOCC to build the SPEC CPU 2017 intrate case 557.xz_r