PC Processors

[Petr123]

Does Ryzen 7 7700X CPU with X670 chipset support DDR5 CRC read/write feature?

[vishvajit]

There is no Ryzen 7 7700X CPU, as the Ryzen 7 series is a different generation from the 7000 series. However, the latest generation of Ryzen processors, such as the Ryzen 7 5800X and 5900X, do not support DDR5 memory. Additionally, as of February 2023, there are no consumer-level motherboards with the X670 chipset available on the market. Therefore, it is not possible to say whether the Ryzen 7 series with X670 chipset will support DDR5 CRC read/write feature, as it is not a currently existing combination.

[goodplay]

Yeh, you be a bit wrong there, 7700X is real.

[MADZyren]

There is Ryzen 1000, 2000, 3000, 5000 and 7000 generations. Within each generation, there are for some reason product lines Ryzen 3, Ryzen 5, Ryzen 7 and Ryzen 9. Maybe this is for same strange reason there is i3, i5, i7 and i9 Intel CPUs.

Would be simpler to just have its number, like 13600 or 7700X, but OEMs can now market their machines with clauses like "powerfull i7 CPU" and consumer can't compare pricing or performance to anything without digging spec sheets hidden far behind marketing nonsense.

[MADZyren]

To my knowledge, Ryzen CPUs support ECC memory, but it is up to motherboard manufacturer to include or exclude support at their end, so you need to check their websites to see if any model supports it. If I remember correctly, the answer is no. DDR5 unlike DDR4 does have an internal error correction mechanism of some sort, but to my understanding, not as robust as ECC. If you need ECC, you might have to wait for Threadripper 7000. Also now Intel is going to release Xeon CPUs at consumer prices, lots of pcie lanes and likely ECC support.

[elstaci]

You need to check to see which Motherboard support ECC RAM and then by looking at the Mobo's QVL List for RAM.

Here is Kingston explanation of ECC on a Die for all DDR5 RAM: https://www.kingston.com/en/blog/pc-performance/ddr5-overview

On-Die ECC

On-Die ECC (Error Correction Code) is a new feature designed to correct bit errors within the DRAM chip. As DRAM chips increase in density through shrinking wafer lithography, potential for data leakage increases. On-Die ECC mitigates this risk by correcting errors within the chip, increasing reliability and reducing defect rates. This technology cannot correct errors outside of the chip or that occur on the bus between the module and memory controller housed within the CPU. ECC enabled processors for servers and workstations feature the coding that can correct single or multi-bit errors on the fly. Extra DRAM bits must be available to allow this correction to occur, featured on ECC class module types like ECC unbuffered, Registered, and Load Reduced.

[misterj]

Pert123, you mean ECC? Please check with the Main Board and memory Vendors. See here. Enjoy, John.

[Petr123]

No. As far as I know, it is a different feature to check integrity of data transmitted through the channel between a processor and RAM. It is not the sideband ECC.