Hi,
When boundary scanning with SP3, AMD family 17h, IDCODE can response correctly with 0000 0000 0000 0010 1010 0000 0000 0011, aka 0x0002a003, but the response of SAMPLE/PRELOAD command is always all low, this is wrong.
Is the PRELOAD code is wrong?
"SAMPLE (00011011),"& -- 8'h1b
"PRELOAD (00011011),"& -- 8'h1b
Tks!
Solved! Go to Solution.
Never heard of Boundary Scan until now when I googled it.
It involves a very Technical Field in debugging of circuit boards as per Wikipedia:
Boundary scan is a method for testing interconnects (wire lines) on printed circuit boards or sub-blocks inside an integrated circuit. Boundary scan is also widely used as a debugging method to watch integrated circuit pin states, measure voltage, or analyze sub-blocks inside an integrated circuit.
The Joint Test Action Group (JTAG) developed a specification for boundary scan testing that was standardized in 1990 as the IEEE Std. 1149.1-1990. In 1994, a supplement that contains a description of the Boundary Scan Description Language (BSDL) was added which describes the boundary-scan logic content of IEEE Std 1149.1 compliant devices. Since then, this standard has been adopted by electronic device companies all over the world. Boundary scan is now mostly synonymous with JTAG.[1][2]
You can try an post your question at AMD Developer's Forum from here: https://community.amd.com/t5/newcomers-start-here/bd-p/newcomer-forum
If this concerns a Server type environment then post here: https://community.amd.com/t5/server-gurus/ct-p/amd-server-gurus
Or you can open a AMD Support Online ticket and ask them directly from here: https://www.amd.com/en/support/contact-email-form
Never heard of Boundary Scan until now when I googled it.
It involves a very Technical Field in debugging of circuit boards as per Wikipedia:
Boundary scan is a method for testing interconnects (wire lines) on printed circuit boards or sub-blocks inside an integrated circuit. Boundary scan is also widely used as a debugging method to watch integrated circuit pin states, measure voltage, or analyze sub-blocks inside an integrated circuit.
The Joint Test Action Group (JTAG) developed a specification for boundary scan testing that was standardized in 1990 as the IEEE Std. 1149.1-1990. In 1994, a supplement that contains a description of the Boundary Scan Description Language (BSDL) was added which describes the boundary-scan logic content of IEEE Std 1149.1 compliant devices. Since then, this standard has been adopted by electronic device companies all over the world. Boundary scan is now mostly synonymous with JTAG.[1][2]
You can try an post your question at AMD Developer's Forum from here: https://community.amd.com/t5/newcomers-start-here/bd-p/newcomer-forum
If this concerns a Server type environment then post here: https://community.amd.com/t5/server-gurus/ct-p/amd-server-gurus
Or you can open a AMD Support Online ticket and ask them directly from here: https://www.amd.com/en/support/contact-email-form
Hi, Elstaci
Tks so much for your reply!
I will post another online support.
Thank you anyway!
B.R.
Did you not have correct power sequence to GENOA CPU?
We found the CPU need correct power sequence then we can access boundary scan register.
Thanks.
We have done the boundary scan at same CPU you give. The CPU can passed boundary scan register test if it have correct control power sequence. There are other way to pull all power rail on by hold a pin of CPLD to high would be power up all power rails. But we didn't try this.
How did you get solve the problem for TDO still low but id code pass? Thanks.