OpenCL

[infovel]

My items run variable number of loop cycles, from 1 to X, and when X is relatively low, on the ballpark of 16k, the entire work completes successfully.

When X grows to 65k, and the percentage of items that reach this figure is also low, on the ballpark of 100-200k, the work also completes successfully.

But if the percentage of the items that reach 65k loop iterations grows to 300-500k, the AMD driver crashes and restarts itself, rendering the application dead.

Is this the expected behavior? Are there any methods to overcome this limitation?

I tested this on the HD5000 and 7000 series under Catalyst 15.7 and Crimson 20 drivers, with the same results.

[dipak · Accepted solution]

From the above description, I suspect it might be a TDR related issue. When the workload is high, the kernel might be taking longer than the TDR timeout value, hence it triggers a TDR.

[infovel]

Yes, this must be the reason. I bumped TDR timeout to a higher value, and the workload completed successfully. It was borderline 1.8-2.1 seconds.