X670nonE --- cutting one of the two PROM21-chips as a cost-cutting measure BUT maintaining some of market segmentation losses that comes with downgrading to a formal B650-circuit. The hardware is the same although I'll admit I'm not sure the constraints that, at the time, came with the segmentation scheme are valid anymore!?
Also, AMD is not very forthcoming (publicly) with technical specifications so a lot has to be pieced together from 2nd sources, I might be wrong on some details.
Appropriate also to cut-out switching and/or PLX-ing for the (GPU)PCIe-lanes as redundant cost and start utilize the PCIe5 speed, not bus-width, as bus-capacity tend to lead AIC-capacity anyways.
I, as an example, run FEA (Finite Element Analysis) on a small cluster, where highly parallelized workloads are offloaded to whatever "second-hand" high core-count resource (i e Threadripper etc) I barely can afford. I still want my CAD GUI on a fast low-thread machine (e g AM5).
I don't need M.2s behind a alu.-slab (for looks). If I for whatever reason would want more than one OS and one internal Work-SSD, I can get a PCIe<->M.2-adapter-card!
I need high speed NICs for the cluster. AMD has not disclosed the full extent of bifurcation, but indirectly, thru the implementation of the PCIe5-lanes on the Asus X670e-e, there seems to be a possible to sub-divide PCIe5x8 further to dual x4 (not included in the original proposal).
If I could afford it, I might like to be able to add a proper GPGPU.
I still have a cable TV card on 1xPCIe.
The MB-makers are now run by the "marketeers" churning out endless versions of same-same-but-different MBs with infinitely small market segments, all for the gamers.
One may remember the early days when direct end-user sales started, how makers like DFI used the whole of the rainbow for the MB components to attract "the kids", eventually realizing it was the solemn look that sold
