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black_zion
Esteemed Contributor III

Rumor: Next Generation AMD EPYC CPUs to have 160+2 PCIe 4.0 Lanes (Dual Socket)

https://www.tomshardware.com/news/amd-epyc-pcie-lanes-zen-2,39010.html

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5 Replies
hardcoregames_
Big Boss
Big Boss

Re: Rumor: Next Generation AMD EPYC CPUs to have 160+2 PCIe 4.0 Lanes (Dual Socket)

Not sure how to use that many lanes as even network cards can make do with 4-8 lanes

ssd arrays may need a few more lanes

seems like overkill to me

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noodles59
Miniboss
Miniboss

Re: Rumor: Next Generation AMD EPYC CPUs to have 160+2 PCIe 4.0 Lanes (Dual Socket)

Agreed, all those lanes are processed serially due to medieval CPU design limitations (x86/64) hence what's the point?

Have 5 or so usb3.x devices transferring data concurrently and you see where the problem really lies - the transfer speed is divided by 5!

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rwd4ever
Adept III
Adept III

Re: Rumor: Next Generation AMD EPYC CPUs to have 160+2 PCIe 4.0 Lanes (Dual Socket)

Well datacentres will be replacing spinning rust with SSDs. Let's say you have 12 SSDs in a rack module, that works out to a lot of bandwidth. You will need server boards with several full-speed PCIe slots. Your Intel CPUs with 48 lanes will not be close to adequate.

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black_zion
Esteemed Contributor III

Re: Rumor: Next Generation AMD EPYC CPUs to have 160+2 PCIe 4.0 Lanes (Dual Socket)

Well, there's the possibility of being able to have 5 PCIe x16 electrical slots (80 lanes), then the other 80 lanes divided out however the motherboard designers wish, be it USB, network interfaces, or drives, giving AMD a large advantage in workstations which will be equipped with 5 GPUs when Intel is competing with just 80 total.

Who knows, with as few details as there are about Rome, the CPUs themselves could use 32 PCIe lanes to communicate with each other, when you have 8 core chiplets and 64 cores per CPU, there's going to need to be -a lot- of crosstalk.

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hardcoregames_
Big Boss
Big Boss

Re: Rumor: Next Generation AMD EPYC CPUs to have 160+2 PCIe 4.0 Lanes (Dual Socket)

My R5 2400G is a tad short on PCIe lanes 

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