Hi all,
I'm in need of some help regarding the FCH LPC Bridge (Rev 51) present in the legion 7 laptop.
Specifically I'm looking for the DataSet information for the chipset as I want to set the chip to boot on power.
I did found an old developer guide for the FCH Bios that contains the information I'm looking for but unfortunately not seems to work in the new models (Or I'm just doing something wrong)
3.6 System Restart after Power Fail
The manner in which the system will restart following a power-fail/ power-restore cycle depends on the
setting of PMIO register 5Bh [1:0].
PMIO Register 5Bh bits[1:0] Description
00b Reserved.
01b The system will always restart after the power is restored.
10b The system will remain off until the power button is pressed.
11b At power-up the system will either restart or remain off
depending on the state of the system at power failure. If the
system was on when the power failed, the system will restart
at power-up. If the system was off when the power failed, the
system will remain off after the power is restored. Pressing
the power button is required to restart the system.
Notes on programming the PMIO register 5Bh:
1. Bits[3:0] should be used for programming. Bits[7:4] are read-only bits and reflect the same
values as bits[3:0].
2. The BIOS programmer should always read the PMIO register 5Bh, modify bit[6] and
bits[3:2] as required, and write back the PMIO register 5Bh. This is required for every boot
cycle and after any RSMRST# or SYS_RST# assertion.
Based on that information I tried:
$ sudo setpci -v -s 00:14.3 0x5B.b=1
pcilib: sysfs_write: write failed: Operation not permitted
0000:00:14.3 @5b 01
But as seen it fails due write protection.
Any advice or a newer document, will be highly appreciated
Thanks!
