Vivado 12-4739 create_clock:No valid objects found for '-objects [get_ports clk100Mhz]'.
Hi, I am working on a (ADC) analog to digital converter code using the IP Source wizard. I configurated the IP Source with a DCLK Frequency (Mhz) of 100 and ADC Conversion Rate (KSPS) of 1000 and Acquisition Time(CLK) of 4 to prevent issues regarding the timing. But when I run the synthesis, I get an error in the synthesis saying:
[Vivado 12-4739] create_clock:No valid object(s) found for '-objects [get_ports clk100Mhz]'.
and later on: [Common 17-55] 'set_property' expects at least one object., in every I uncommented in the xdc.
I don´t understand why this is an error I am receiving. I would appreciate any help.
The possible reason for this is the object name "clk100Mhz" is not matched with the design. You could open the synthesis design and check the real name of the clock. And change the xdc file accordingly.
