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EPYC Discussions

dj5
Journeyman III

BIOS development using openSIL

I am working as a BIOS/BMC developer in an ODM. I am working on a server project which has an AMD EPYC CPU. We want to develop our own BIOS using AMD openSSL for our  internal and debug purposes. I am looking for the procedure to generate Server BIOS using openSIL for AMD EPYC sp5 system. 
 
Please provide suggestions and help me to develop the openSIL BIOS. 
 
FYI, We learned we signed an NDA with AMD. 
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Hi @dj5 - we open sourced AMD openSIL for AMD 4th Gen EPYC CPU (code named Genoa), that you may find at https://github.com/openSIL. Our open source partners plan to open source host firmwares based on UEFI and coreboot that can integrate openSIL for AMD CRB based on Genoa CPU in the very near future.

Please reach out to me at raj.kapoor@amd.com with specifics and we can potentially look into integrating you into our list of development/contributing partners.

Please also note, Genoa is not a POR intercept of the AMD openSIL that was recently open-sourced and is meant only for evaluation of openSIL as a future intercept. For details, please refer to the OCP presentation that you may find here - https://drive.google.com/file/d/1Y__J0OwVZ_gx54dGeDW4mxtc1dmRoG32/view.  

 

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Hi @dj5 - we open sourced AMD openSIL for AMD 4th Gen EPYC CPU (code named Genoa), that you may find at https://github.com/openSIL. Our open source partners plan to open source host firmwares based on UEFI and coreboot that can integrate openSIL for AMD CRB based on Genoa CPU in the very near future.

Please reach out to me at raj.kapoor@amd.com with specifics and we can potentially look into integrating you into our list of development/contributing partners.

Please also note, Genoa is not a POR intercept of the AMD openSIL that was recently open-sourced and is meant only for evaluation of openSIL as a future intercept. For details, please refer to the OCP presentation that you may find here - https://drive.google.com/file/d/1Y__J0OwVZ_gx54dGeDW4mxtc1dmRoG32/view.  

 

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