Are you familiar with this documentation?
AMD64 Architecture Programmer's Manual Volume 2: System Programming
13 Software Debug and Performance Resources
13.2 Performance Monitoring Counters
13.3 Instruction Based Sampling
13.4 Lightweight Profiling
A.6 Performance Monitoring MSRs
It was last updated this past week, so it might be up-to-date with respect to Ryzen, modulo architecture-specific restriction information in the BKDG.
(more on changes here: Need BIOS and Kernel Developer’s Guide Family 17h )
Thanks for the answer.
Yes, I know the documentation and used it already. But the system programming manual does not contain the available events for the Zen architecture. The registers are the ones listed in the manual. But without the event codes, you never know that is measured exactly. Some of the K16 (Kabini) events are working but the event code for K16 can be a different event on K17 (Zen). The events are commonly listed in the related BKDG.
AMD posted initial Ryzen Model Specific Register (MSR) documentation to Tech Docs this week in the form of
- "Processor Programming Reference (PPR) for AMD Family 17h Model 01h Revision B1 Processors". Thank you AMD.
Section 2.1.13 Performance Monitor Counters contains the PMC details.
A comparison pass shows many differences across family/model 17h/00h PPR, 16h/30h BKDG, 15h/70h BKDG (see https://community.amd.com/thread/213584#thread-message-2793789 ).
thanks for the information and thanks AMD. The Ryzen CPU is integrated into LIKWID. All performance monitoring stuff from the PPR is implemented and tested (except IBS).
Are there any infos about the NorthBridge counters for AMD Zen? According to a comment in the Linux kernel sources (v4.12, file arch/x86/events/amd/uncore.c, line 521ff), they are used in the Zen architecture as 'Data Fabric' counters:
* For F17h, the Northbridge counters are repurposed as Data
* Fabric counters. Also, L3 counters are supported too. The PMUs
* are exported based on family as either L2 or L3 and NB or DF.
I tried to implement them and the registers are available, but all K16 Northbridge events return zero, so either the AMD Ryzen does not support the Data Fabric counters or the event configuration were wrong.
Update: AMD posted a shorter document with a few added performance counters to https://support.amd.com/en-us/search/tech-docs
- Open-Source Register Reference for AMD Family 17h Processors
Section 2 is on Performance Monitor Counters.
10 additions, 1 subtraction, listed https://community.amd.com/message/2850214#comment-2850214