PC Processors

[li12242]

In AMD Genoa serials, there are 9654 CPUs with 12 CCDs and 9454 CPUs with 8 CCDs. How to determine the number of CCDs? Could we read the number from CPUID instructions?

[BillyFeltrop · Accepted solution]

To determine the number of CCDs in a CPU, you can use various methods, including:

Manufacturer Specifications: The manufacturer of the CPU, in this case, AMD, should provide specifications that indicate the number of CCDs in a particular model.

CPUID instructions: You can use the CPUID instruction to read the processor information, including the number of cores, threads, and cache size. However, the CPUID instruction does not directly provide information about the number of CCDs.

In the case of AMD Genoa processors, the number of CCDs is not directly accessible via CPUID instruction. However, you can use other CPUID information to infer the number of CCDs indirectly. For example, you can check the "Core Complex ID" (CCX ID) information provided by the CPUID instruction, which identifies the particular CCX within a CCD.

In summary, while it's not possible to directly read the number of CCDs from the CPUID instruction, you can use other information such as the CCX ID to infer the number of CCDs. Alternatively, you can refer to the manufacturer's specifications to determine the number of CCDs in a particular CPU model.

[cyring]

Hello,

Which CPUID leaf and bit field is provided you the CCX ID number ?

Regards

[fairydreaming]

It's in 0x80000026 leaf. Based on the output of cpuid -r -l 0x80000026 I think this info is in bits 4-7 of edx, matches numactl --hardware output on my Epyc 9374F (I have 8 NUMA domains, one for each CCD).

Also check out this Phoronix article: https://www.phoronix.com/news/Linux-AMD-0x80000026-Leaf

It seems that starting with kernel 6.10 this info is correctly reported in /sys/kernel/debug/x86/topo/cpus/ (die_id field).

[cyring]

Interesting; thank you.

Dumping 0x80000026 sub-leaves of some 7950X CPUs we are getting:

CPU #0   function         EAX          EBX          ECX          EDX            
|- 80000026:00000000    00000001     00000002     00000100     00000000         
|- 80000026:00000001    00000004     00000010     00000201     00000000         
|- 80000026:00000002    00000004     00000010     00000302     00000000         
|- 80000026:00000003    00000005     00000020     00000403     00000000         
...
CPU #6   function         EAX          EBX          ECX          EDX            
|- 80000026:00000000    00000001     00000002     00000100     0000000c         
|- 80000026:00000001    00000004     00000010     00000201     0000000c         
|- 80000026:00000002    00000004     00000010     00000302     0000000c         
|- 80000026:00000003    00000005     00000020     00000403     0000000c         
...
CPU #9   function         EAX          EBX          ECX          EDX            
|- 80000026:00000000    00000001     00000002     00000100     00000012         
|- 80000026:00000001    00000004     00000010     00000201     00000012         
|- 80000026:00000002    00000004     00000010     00000302     00000012         
|- 80000026:00000003    00000005     00000020     00000403     00000012         
...
CPU #15  function         EAX          EBX          ECX          EDX            
|- 80000026:00000000    00000001     00000002     00000100     0000001e         
|- 80000026:00000001    00000004     00000010     00000201     0000001e         
|- 80000026:00000002    00000004     00000010     00000302     0000001e         
|- 80000026:00000003    00000005     00000020     00000403     0000001e         
...
CPU #23  function         EAX          EBX          ECX          EDX            
|- 80000026:00000000    00000001     00000002     00000100     0000000f         
|- 80000026:00000001    00000004     00000010     00000201     0000000f         
|- 80000026:00000002    00000004     00000010     00000302     0000000f         
|- 80000026:00000003    00000005     00000020     00000403     0000000f         
...
CPU #24  function         EAX          EBX          ECX          EDX            
|- 80000026:00000000    00000001     00000002     00000100     00000011         
|- 80000026:00000001    00000004     00000010     00000201     00000011         
|- 80000026:00000002    00000004     00000010     00000302     00000011         
|- 80000026:00000003    00000005     00000020     00000403     00000011         
...
CPU #31  function         EAX          EBX          ECX          EDX            
|- 80000026:00000000    00000001     00000002     00000100     0000001f         
|- 80000026:00000001    00000004     00000010     00000201     0000001f         
|- 80000026:00000002    00000004     00000010     00000302     0000001f         
|- 80000026:00000003    00000005     00000020     00000403     0000001f         

Although EDX is documented by PPR as "Extended Local APIC ID"; [7:4] nibble would indeed mean the CCD number.

EDIT: PPR Vol 1 for AMD Family 1Ah Model 02h C1

If cluster destinations are in use, bits[7:4] of Core::X86::Apic::LocalDestination[Destination] are checked against bits[7:4] of the arriving interrupt's destination field to identify the cluster. If all of bits[7:4] match, then bits[3:0]  of Core::X86::Apic::LocalDestination[Destination] and the interrupt destination are checked for any bit positions that are set in both fields to identify processors within the cluster. If both conditions are met, the local APIC is a valid destination.
Cluster format allows 15 clusters of 4 APICs each to be addressed.

---

CPU#	Ext_APIC	CCD#
0	0x00	0
6	0x0c	0
9	0x12	1
15	0x1e	1
23	0x0f	0
24	0x11	1
31	0x1f	1

[cyring]

Is there a Register to identify CCX ?

Cluster layout differs among Zen architecture generations.

A numbering function based on APIC would require some kind of table to look for a group divisor up.