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10-25-2024
08:13 AM
Zynq 7000 Axi gpio and EMIO question
Hello, I got a rather curious question.
I was looking at the zynq 7000 diagram and noticed that the EMIO can pass through the PL.
It got me thinking, is it at all possible to route the AXI GPIOs to the selected MIO pins via EMIO?
Or even program it so that a signal goes through an AXI GPIO and through, say, the UART pins via EMIO at the same time?
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10-25-2024
10:15 PM
There is a separate support forum, go to https://www.xilinx.com/support.html
My PC- Ryzen 5 5600x, B550 aorus pro ac, Hyper 212 black, 2 x 16gb F4-3600c16dgtzn kit, NM790 2TB, Nitro+RX6900XT, RM850, Win.10 Pro., LC27G55T.
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