From Microsoft's site concerning DXR.
"The primary reason for this is that, fundamentally, DXR is a compute-like workload. It does not require complex state such as output merger blend modes or input assembler vertex layouts. A secondary reason, however, is that representing DXR as a compute-like workload is aligned to what we see as the future of graphics, namely that hardware will be increasingly general-purpose, and eventually most fixed-function units will be replaced by HLSL code. The design of the raytracing pipeline state exemplifies this shift through its name and design in the API. With DX12, the traditional approach would have been to create a new CreateRaytracingPipelineState method. Instead, we decided to go with a much more generic and flexible CreateStateObject method. It is designed to be adaptable so that in addition to Raytracing, it can eventually be used to create Graphics and Compute pipeline states, as well as any future pipeline designs."
Interesting how the thinking behind the DX12 API and Microsoft closely mirrors AMD's approach with Vega, one piece of hardware for all applications. Since Vega is already much stronger in compute than NVidia's gaming cards, I don't think the ray-tracing will slow them down much. If anything, they would be able to run a higher number of samples than NVidia.
And the RTX core essentially uses machine learning via tensor cores found in Volta. Even NVidia's 2000 series doesn't have anywhere near the hardware to fully eliminate rasterisation and fully ray-trace a scene. And really, that isn't necessary, rasterisation has become quite acceptable for many applications. It is particularly bad at things like shadow edges, reflections, and distance to a light source. Ray-tracing even for just those applications is a pretty heavy process, and consumer GPUs can only run enough rays to produce a pretty low resolution image. That is where the tensor cores come in. The Tensor cores are capable of multiple precision execution (two FP16 matrixes can be multipled to form a single FP32 matrix), meaning it can perform both FP16 or FP32 on a single core. FP16 is what is typically used in machine learning, and NVidia leverages that, along with a proprietary algorithm to "denoise" the ray-traced image and overlay it over the rasterized image in real-time. This gives the appearance of an image that was sampled with more rays than are actually there.
Vega already has more compute functionality than either Pascal or Turing, so Vega could likely produce a better image simply by running more ray-traced samples. But, since Vega is also used in the Instinct line, it comes with "Rapid packed Math", which is just AMD's term for exactly what the Tensor core does, multiple precision execution. So there is no reason, AMD couldn't execute the same denoising approach that NVidia has, the hardware is already there.
