I am working to write testbench for Vivado generated AXI QUAD SPI v 3.2 IP. The configuration settings were SPI Standard mode, 1 slave, Fifo depth is 16, non xip mode. I am taking guidance from these two product guides pg153 axi quad spi and W25Q64BVSFIG Winbond. As I am configuring IP in standard mode as master therefore the command sequences for MICRON, WINBOND, and SPANSION all are overlapping (as per my knowledge). I had successfully executed the Write Enable Command Sequence from pg153 axi quad spi guide (pg 105). Further, I was supposed to perform WRITE DATA Command Sequence. For that I had to erase a block/sector to make it available for page program. But in the erase command I got error from slave side. The bresp signal gave 2 indicating SLVERR instead of 0 which indicates OKAY. I have done a lot of hit and try but I am stuck at it now. There might be an issue with valid address that I am giving to get it erased. Or some other issue that I can not figure out. WINBOND Screenshot block erase command The simulation screenshot is as follows simulation screenshot SPANSION DATASHEET Screenshot: SPANSION DATASHEET says any (sector/block) address is valid My testbench My_testbench. Product guides: LINK FOR DOWNLOADING WINBOND DatasheetLINK FOR DOWNLOADING pg153axiquadspi Please advise, Malyka