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AMD EPYC™ 9374F Processor STAC-N1™ Benchmark Results

Milind_Damle
Staff
Staff
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This blog describes why 4th Gen AMD EPYC processors are ideal for critical financial workloads, introduces the Securities Technology Analysis Center (STAC®) and the STAC-N1 benchmark, and then describes the systems tested and the results of those tests.

About STAC and the STAC-N1 Benchmark

STAC facilitates the STAC Benchmark™ Council (www.STACresearch.com/council), an organization of leading financial institutions and technology vendors that specifies standard ways to assess technologies used in finance. The STAC Benchmark Council created STAC-N1 benchmarks to measure the performance of network stacks under a simulated market data environment.

The STAC-N1 benchmark uses common financial services workloads in a vendor-neutral manner across many network APIs without the need for additional applications such as middleware or exchange feed handlers. The STAC-N1 result demonstrates low-latency capabilities of systems and is of particular importance to the FSI market that relies on high-frequency trading applications. This benchmark provides a level of automated testing and analysis and returns a detailed latency analysis along with throughput, CPU, and memory statistics.

AMD EPYC Processors are Ideal for the Financial Services Industry

4th Gen AMD EPYC processors deliver world record performance for critical workloads, thanks to features such as:

  • Up to 96 physical cores and up to 192 threads per processor
  • Up to 384 MB of L3 cache per processor (standard) or 1152 MB per processor (with AMD 3D V-Cache™ technology)
  • Up to 6TB of DDR5-4800 RAM
  • 128 lanes of fast PCIe® Gen 5 lanes in a single-processor configuration, or up to 160 in a dual-processor system

The performance delivered by these features make 4th Gen AMD EPYC processors ideal for FSI market because an advantage of even a few microseconds can mean millions of dollars of profit.

Systems Tested

The configuration that was tested by STAC and published in the  STAC Report for STAC-N1 used two HPE ProLiant DL325 Gen11 servers powered by one AMD EPYC 9374F processor (32 cores), using UDP over 25GbE using AMD Xilinx OpenOnload® on Red Hat Enterprise Linux 8.6 with AMD Xilinx XtremeScale™ X2522-25G-PLUS adapters. Communication between the servers occurred over a single switchless 25GbE cross-connect cable with Forward Error Correction (FEC) disabled. The key system components were:

  • 1 x 32-core AMD EPYC™ 9374F CPU @ 3.85GHz (4.3 GHz Boost1)
  • 12 x 32 GiB DDR5 DIMMS @ 4800 MT/s
  • Red Hat Enterprise Linux 8.6 (kernel 4.18.0-372.26.1.el8_6.x86_64)
  • sfc 5.3.12.1023driver with OpenOnload 8.0.0.34 AMD Xilinx XtremeScale X2522-25G-PLUS adapter via cross-over cable with FEC disabled

4th Gen AMD EPYC Processors Continue Stacking Up

The configuration described above demonstrated excellent UDP performance and compared to all earlier published non-overclocked systems showed the following characteristics:

  • The lowest mean and 99 percentile latency for the base rate of 100k messages per second

(STAC.N1.β1.PINGPONG.LAT1)

  • The highest maximum throughput tested of 1.5 million messages per second

(STAC.N1.β1.PINGPONG.TPUT1)

  • The lowest 99 percentile and maximum latency at the highest rate tested for SupplyToReceive

latency (STAC.N1.β1.PINGPONG.LAT2)

The result was showcased at the STAC Summit in London on May 4, 2023. You can view the summary of the results here. Premium STAC subscribers can obtain additional details about these impressive results.

The max latency results mentioned in the Report Card were only observed during the first sample of the test. These latencies are due to startup overhead (likely from OpenOnload) and can be eliminated in a production environment using warm-up messages. The maximum SupplyToReceive latencies drop after the first interval. The STAC-N1 benchmark requires fewer than half the cores of an AMD EPYC 9374F processor, which leaves the remaining cores available to concurrently run another application in a production environment.

REFERENCE

  1. For AMD EPYC processors, the boost frequency is the maximum frequency achievable by any single core on the processor under normal operating conditions for server systems. EPYC-18

Milind Damle is Sr. Director in the Data Center Ecosystems and Solutions team at AMD. His postings are his own opinions and may not represent AMD’s positions, strategies, or opinions. Links to third party sites are provided for convenience and unless explicitly stated, AMD is not responsible for the contents of such linked sites and no endorsement is implied.

“STAC” and all STAC names are trademarks or registered trademarks of the Securities Technology Analysis Center, LLC.