Editor’s Note: This content is contributed by Suhel Dhanani, Director of Software Marketing, AMD Adaptive SoCs and FPGAs.
As designs get more complex, AMD is continuing to innovate—ensuring that system architects and developers have the tools they need to efficiently develop mixed-domain designs that include both the processing subsystem and the FPGA fabric.
Today, I am pleased to announce the Vitis™ unified software platform 2023.2 release, offering a singular environment to facilitate the streamlined design, simulation, and implementation of high-performance designs using AMD adaptive SoCs and FPGAs.
Our latest release unleashes new functionality, such as a standalone tool for embedded C/C++ design, a new unified GUI, and a host of enhancements to simplify the use of AMD Versal™ adaptive SoCs with AI Engines (AIEs).
New Features Help You Develop Versal AIE-DSP Designs
Our 2023.1 release offered enhanced tools that support implementation for AIE-based DSP designs. The 2023.2 release takes those enhancements even further, with new DSP library functions, new API support for DSP functions, and new features in the AIE simulator/compiler.
Starting with 2023.2, the AIE simulator/compiler tool chain now supports Versal Edge AIE-ML architecture, including the larger AIE-ML memory tiles. This enables high-performance DSP designs in Versal AI Edge devices.
New DSP library functions for AIE, such as Mixed Radix FFT, Discrete Fourier Transform (DFT), and General Matrix-Vector Multiply, help simplify the development process. For AIE-ML, new DSP library functions include additional FIR filter configurations (Half-Band, Single Rate, Fractional Resampler, Rate Change Interpolation/Decimation), General Matrix Multiply (GeMM), and DFT.
This release also provides API support for implementing FFTs with cint32 twiddle data types, cint16 for Radix-4 FFTs, and vectorized “fix2flt” and “fit2fix” operations.
A new multi-threaded simulator kernel accelerates AIE DSP design simulation. AIE simulator also now enables the use of real-time traffic generation capabilities from MATLAB® and Python for testing.
Vitis™ analyzer now adds a guidance report to help you choose the right FIFO size, which can stop deadlock congestions and maximize the performance and reliability of the system.
Build Embedded Designs Fast with a Standalone Tool
We heard customers’ feedback related to the need for a standalone embedded tool for C/C++ application code development. The 2023.2 release introduces Vitis™ Embedded, a new tool customized to the needs of developers seeking to design and compile C/C++ software for embedded processing subsystems.
A single download of <15 GB—significantly smaller than the full Vitis software platform—delivers a complete compiler and simulator for Arm® and MicroBlaze™ processors along with all the features developers need for embedded processing subsystem designs.
Streamline Development with an Easy-to-Use, Unified Interface
With this new release, we’ve introduced a new unified, next-generation graphical user interface (GUI) for all Vitis tools. Now, developers no longer need to learn or work in multiple GUIs.
Vitis Embedded, Vitis HLS, Vitis analyzer, and the AIE compiler now all have a unified look and feel for a seamless user experience.
Leverage End-to-End Tools for Complex Designs
We hope you’re as excited about these updates as we are.
As we look forward to 2024, we will continue to focus on optimizing tools, libraries, and functions to meet next-generation design requirements, including for the use of AIEs within Versal adaptive SoCs.
Learn more about the 2023.2 release details here, or download now to get started.
©2023 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD Arrow logo, Versal, Vitis, and combinations thereof are trademarks of Advanced Micro Devices, Inc. MATLAB is a registered trademark of The MathWorks, Inc. Arm is a registered trademark of Arm Limited (or its subsidiaries or affiliates) in the US and/or elsewhere. Other product names used in this publication are for identification purposes only and may be trademarks of their respective owners.
