jiayaocang

how to distinguish L3 miss between local core and others with using only one counter

Discussion created by jiayaocang on Jul 28, 2008
Latest reply on Oct 8, 2008 by jiayaocang
discription of the L3 miss event :
L3_CACHE_MISSES: (counter: all)
Number of L3 cache misses from each core (min count: 500)
Unit masks (default 0xf7)
----------
0x01: Read block Exclusive (Data cache read)
0x02: Read block Shared (Instruciton cache read)
0x04: Read block Modify
0x10: Core 0 select
0x20: Core 1 select
0x40: Core 2 select
0x80: Core 3 select

i want use one counter to monitor L3 miss, for example,
counter 1 in core0 with mask 0x17,
counter 1 in core0 with mask 0x27,
counter 1 in core0 with mask 0x37,
counter 1 in core0 with mask 0x47,
so counter 2 through 4 could be used to monitor other events.
how do i describe the above configuration in oprofile/daemonrc?

Outcomes