5 Replies Latest reply on Nov 8, 2008 7:49 PM by sgratton

    Reduction buffers, RV670 assembly



      Where could I find more information about the different types of buffers supported by the rv670 chipset (reduction, scratch, etc.)?  I'm particularly interested in the reduction buffers.  The r600isa doc teases:

      "A reduction buffer is an off-chip buffer used to help compute results across multiple threads, such as accumulate operations."

      I want it!   How do I use it?  I am quite willing to venture into device-specific assembly, since IL presently does not seem to expose this feature.

      Speaking of device-specific assembly, is there a rv670isa doc akin to the r600isa doc distributed with CAL?  I would like to learn more about the double precision instructions.



        • Reduction buffers, RV670 assembly
          Do you mean this ?
          Reductions are kernels that decrease the dimensionality of a stream by folding
          along one axis using an associative, commmutative binary operation. The re-
          quirement that the operation be associative and commutative means that the
          result is independent of evaluation order, modulo any issues due to limited oat-
          ing point precision.
          Reductions are currently only available for 1-dimensional streams and are
          not compatible with address translation mode.
          Brook provides two mechanisms for specifying reductions: reduction vari-
          ables and reduction functions.
          you can found information about reduction in C:\Programmi\AMD\BROOKPLUS SDK v1.00.0_beta\doc BrookPlusSpec.pdf
          • Reduction buffers, RV670 assembly
            Cuorematto, he is refering to reduction buffers specified in r600isa.pdf. It is introduced as a type of memory read/write in section 3.4.2, further specified in 7.1 with the actual binary instruction format specified in section 8.1. This is very different than the reductions that are done at the brook level.

            As for how it is used, we don't have any samples that use it and is not something that is exposed at the IL level. For information on double precision, the only current docs that we have is the il.pdf which has the supported double opcodes.

            • Reduction buffers, RV670 assembly

              Hi there Lukasz,

              One thing you can do until more documentation is released is to use the gpu shader analyser (or alternatively calDisassembleObject). One can compile simple double precision brook+ kernels to r600isa (look at the end to avoid the address translation code), and also the gather/scatter/scratch il examples to r600isa. They all compile fine and you can see how at least some of the things you mention work and what the syntax is.