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AFAIK, the K10 pipeline depth is similar to the K8's one. Just for curiousity , what for?
Hm. I should try to dig up the K8.
We're trying to do some research - trying to find performance metrics that are microarchitecture independent so that we can profile an app on one computer, and it would be transferable to another computer with heterogeneous cores.
So knowing the pipeline depth may help us remove/alleviate the architecture's influence on flushes/stalls. e.g. the stall due to branch misprediction is dependent on the microarchitecture. Chances are the chip would pay higher penalty with deeper pipeline than chips that have lower pipeline depth. Well this example is kinda contrived, but you never really know what info could be handy. # of branches mispredicted would be dependent on your branch predictors - it could be the BTB or the Global History Bimodal Counters that mispredicted, and different chips have different stats on these things.
So yeah, I've been benchmarking and poking at performance counters, and we need to come up with good ways to abstract out these counter's dependency on microarchitecture.
Well, 1-2 years ago several serious sites like Anand Tech and Real World Tech published the certain materials on this theme. Alas, I'm not quite sure about, but I remember those numbers for K10: 12 for integer and 17 for float operations. BTW, there (http://www.sandpile.org/impl/k8.htm) we can see the same numbers for K8 too.
Cool. Thanks for the help!