7 Replies Latest reply on Mar 6, 2008 6:07 AM by avk

    Multiple prefetch sample form AMD64 Opt Manual

    danielp
      In the Soft Opt Guide for AMD64 Processors (on page 107), there is a sample for multiple prefetch where the loop starts with:

      prefetchw [eax+256] ; Four cache lines ahead
      prefetch [ebx+256] ; Four cache lines ahead
      prefetch [ecx+256] ; Four cache lines ahead

      But the values of eax, ebx and ecx don't change inside the loop. Is this an error or this is how we are supposed to use it?