Memory Access Ordering

Discussion created by u1ik on Jan 28, 2008
The table in the AMD Manual Vol. 2 on page 173 is not quite correct. For the ordering between "load(wp, wt, wb, uc) and load(wp, wt, wb, uc), the table says A load (wp,wt,wb,wc,wc+) may pass a previous non-conflicting store (wp,wt,wb,wc,wc+)".

Can anybody tell me whether or not, loads may overtake loads.