[SOLVED] What's the max Core count per Socket in the whole x86 architectures range ?

Discussion created by cyring on Aug 14, 2019
Latest reply on Aug 18, 2019 by cyring

With the introduction of the EPYC with more than 32 Cores / 64 Threads, my project CoreFreq is impacted to face such a high number of CPUs.


Can we say than a 64 bits architecture is de facto limiting the number of physical Cores to 64 ?


Can we say than a 64 bits architecture preserve any memory atomic operation to a quad word ?


What is the most discriminant definition of 64 bits ? The size of the cache line queried from cpuid ?


Other thoughts ?


Impacted source code

I'm using asm atomic operations for several purposes:

  • bit-mask
  • threads synchronization

Where each CPU, based on its number, is assigned a bit location in quad-word. This allows simple atomic comparaisons for instance.

Issue: with a 128 SMT cores Processor, the 64 bits memory and register involved in atomic operations are not "long" enough to store all CPUs.