Since i was desperate looking to contact some amd people on my thought/idea as i didn't wanted it to be overlooked as it could give some interesting performance gains to APU's if i am right.
i was being pointed from some Techtubers to the AMD Red Team discord, and from there, onto here. so here i am.
i will try to keep my post organized where i can below:
With limiting RAM bandwidth increases, hurting APU's pretty hard as of these days, and other interconnects reaching current RAM bandwidth speeds, or even exceeding them, APU's don't benefit from using system RAM for GPU video buffers as much anymore for higher resolutions or more graphic fidelity.
PCIe 4 specs compared to DDR4 in bandwidth:
So i was thinking aloud of what the PCIe 4.0 standard really brings to the table in performance.
Is short, a 16 lane configuration is upto 64GB bandwidth per second, equalling to roughly dual channel DDR4 memory at 4000MHz on it's own.
So in theory if you use dual channel DDR4 memory at 4000MHz, and some other usecase can handle a different memory pool using the PCIe 4.0 interface, that would be very nice, right?
My rough idea:
Then i came to the realization a possibilty of having a PCIe 4.0 enabled AMD Zen baed APU, with the graphics part of the chip using the PCIe 4 interface to connect to a (maybe low profile) memory pool/buffer (or both?) using a modified High Bandwidth Cache Controller (HBCC for short) to offload the system RAM in memory sensitive tasks like games.
This essentially can mean a add-in PCIe 4.0 memory cardcan be easily put into a small form factor PC, giving a (customizable?) video buffer interface of max 64GB per second in addition to say DD$4 running at 3200MHz (51GB/s). this would offload the RAM controller alot, especially in ram and vram heavy tasks (full HD gaming and beyond).
It could be another good way marketing to push for the PCIe 4.0 standard, making it easier to justify the mainboard cost price increase, and give a more realistic use of PCIe 4.0 for APU gamers at higher fidelity/resolutions.
So imagine a scenario like this:
A 65W TDP AMD APU with:
6 to 8 Zen2 cores (1 chiplet) at 3.2GHZ (consuming around 35watts at those clocks)
A Navi based graphics chiplet consuming around 35watts max.
With another 12watts for a slightly new io chip to allow use of the main PCIe 4.0 16 lanes being used as video memory if present in the PC.
2x16GB DDR4 3200 dual channel (= 51GB/s for game/driver/other use for memory)
a card of say 8GB video memory in the main PCIe 4.0 x16 slot for just video memory (64GB/s, pixel buffers, textures, and so on)
This would allow consumers to pop in a different sized video buffer at 64GB transfer speed max (example: 4GB to 8 GB), freeing up system RAM consumption, system RAM bandwidth and the like
I know this might sound like somewhat science fiction for now, but it shouldnot impossible at all.
Now for PCIe 5.0, 128GB per second vram speeds? that would easily enable medium graphics 1440p gaming with more than 60fps on a single desktop APU in the future, all on a APU package of around 65W.
I know it is unlikely to happen soon, and i even do not know if there will be too much latency.
Also i do not know the overhead translateing pcie comms to memory interface doing so, signal delay and such, as i am by no means electrical engineer.
And finally, as on liner, assuming this is a doable idea:
Creating the ability of using the main 16 PCIe 4.0 lanes to be used as video buffer interface for APU's.
Tell me what your opinions are on this, is it feasible, it it hard to achieve, or do you have a different view/take on such a thing? Post below