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Loopback Related Question

Question asked by jaydevshelat on May 6, 2019


I am using the Opteron A1100 SoC chip.


My requirement is to test/tune the Ethernet KR link.  Link partner is an FPGA.  I have successfully established a 10G KR link. 


Question: Is there a way for me to enable serial loopback inside the SoC -- i.e. AMD Rx to Tx  (basically, I want the SoC to re-transmit what it receives from the link partner)


I believe this is the easiest way for me to tune the link -- i.e. use FPGA analog configurability.  I see that the PPR mentions Loop-Back mode.  But, I can't find information on what it means and how to enable it. 


Also, if anyone has ideas on how to tune the backplane (i.e. KR) link; I will take that!


Any help will be super appreciated!  Thank You in advance!