Processors

[shamaz]

Hello. I have viewed this document and found only PMCx040 register for data cache accesses. Does my processor (Ryzen 5 1600x) have also PMC for counting data cache misses? I cannot find an answer in that document.

[elstaci]

Not familiar with PMC but found this website that indicates which AMD/Intel CPU are compatible. It probably is an old list: pmc(3) - library for accessing hardware performance monitoring counters

[shamaz]

By the fact, I am FreeBSD user myself and is familiar with pmcstat utility. Unfortunately, all 17h PMC stuff appeared in FreeBSD 12.0 is not yet documented. I viewed libpmc sources and found only stuff related to L1 instruction cache (this information is also present in section 2.1.13.3.3 "IC and BP Events" of PPR), but not for L1 data cache (or other levels).

I wonder if data cache statistics collection is implemented in Linux.

[czg]

In this new PPR 2019 doc of your cpu family and model, p173 has L2 events PMCx064 related with cache miss.

I hope that I has understood your problems.