Intel compilers would generate lowest-common denominator code if it saw a non-Intel CPU. You could specify SSE3, but that was the limit, due to Phenom and Bulldozer diverging from Intel SIMD.
Now Ryzen seems to be more harmonised with Intel's instruction sets. Has anybody tried compiling for AVX, and not had the resulting code crash and burn?
I have only found one message in these forums about this subject, but the poster seems to have got it wrong way around.