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Last Level Cache on Opteron

Question asked by marin.cosmin on Sep 28, 2017

I am interested in the LLC topology and functionality for Opteron processors.


To be more specifically, in Intel the LLC is split into as many slices as cores in the system. In spite of being "distributed", LLC is shared among the cores, namely any core can access any slice.

The mapping between a memory block address and the slice to be hosted on is done by using a hash function that gets as input data some of the address bits. However, the hash function is not disclosed by Intel.


How is LLC in AMD comparing to Intel ?


Best Regards,

Cosmin Marin