my questions are related to the caches of A10-78[5|7]0K APUs.
- I wonder if the iGPU can directly access data from a L2-cache of a CPU module?
- Are the two L2-caches shared among the two CPU modules?
The slides from HOT CHIPS  are not very clear and the discussion in  says, that the iGPUs' L2 is of size 512KB whereas the CPU has 2x2MB. This would imply that either GPU and CPU don't share the L2 cache or that the CPU-L2 is the "L3" of the GPU.
In the work of He et al. , the CPU is used to prefetch data into L2 which results into ~30% less memory stalls on the GPU.