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About the cache coherence between CPU and descrete GPU

Question asked by lennox on Aug 12, 2014
Latest reply on Aug 14, 2014 by maxdz8

Hi all,

I am studying how to create an interactive connection between a CPU and a descrete CPU on OpenCL.

I create a buffer(unsigned long) with CL_MEM_ALLOC_HOST_PTR flag, and then I pass the buffer to be a kernel argument.

I am sure the buffer is pinned in host memory by the report of the CodeXL.

The kernel code for GPU  is an infinite loop to probe the buffer, if the buffer is not zero, the loop will break.

After issue the kernel code, the CPU-side program waits for a while and then changes the buffer to 1.

(I call clEnqueueMapBuffer to get the pointer and call clEnqueueUnmapMemObject after the modification)

I expect that the GPU could notice the buffer is not zero and then exits the infinite loop.

However, the result is the loop cannot be terminated.

I  doubt it is because the GPU has cached the content of the buffer and the vaule is still zero.

Will the hardware or the dirver keep cache coherence?

If the answer is no, can I flush the cache of GPU?


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