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Problem using northbridge events

Question asked by guipy on Feb 18, 2014
Latest reply on Feb 19, 2014 by guipy

Hello, i'm new in the CodeXL 'world' - i'm using the tool for CPU profiling, in a Opteron Bulldozer ccNUMA architecture, with 64 cores and 8 NUMA nodes.

 

The problem is that i can't evaluate Northbridge events...for example, if i try a Custom Profile with only the event '[0E9] CPU/IO Requests to Memory/IO', CodeXL shows a textbox "The configuration contains a northbridge event: [0xe9] <a bunch of non-printable characters> which is not a valid sampling event. Please fix the configuration". What is this? I can't do northbridge profiling or this means a misconfiguration of my part?

 

I really need to profile northbridge events in my experiments...hope it's possible. I'm on Ubuntu 12.04, and below is a paste of the output of 'cat /proc/cpuinfo' [only 1 CPU].

Thanks in advance,

 

 

Guilherme

 

 

 

output of 'cat /proc/cpuinfo' :

 

processor    : 63

vendor_id    : AuthenticAMD

cpu family    : 21

model        : 1

model name    : AMD Opteron(tm) Processor 6282 SE             

stepping    : 2

microcode    : 0x6000613

cpu MHz        : 1400.000

cache size    : 2048 KB

physical id    : 3

siblings    : 16

core id        : 7

cpu cores    : 8

apicid        : 143

initial apicid    : 111

fpu        : yes

fpu_exception    : yes

cpuid level    : 13

wp        : yes

flags        : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc extd_apicid amd_dcm aperfmperf pni pclmulqdq monitor ssse3 cx16 sse4_1 sse4_2 popcnt aes xsave avx lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 nodeid_msr topoext perfctr_core arat cpb npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold

bogomips    : 5199.98

TLB size    : 1536 4K pages

clflush size    : 64

cache_alignment    : 64

address sizes    : 48 bits physical, 48 bits virtual

power management: ts ttp tm 100mhzsteps hwpstate cpb

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