NVIDIA released CUDA 5 platform. Does AMD plan to support any dynamic parallelism extensions in AMD APP SDK? Will this be available for GCN, Sea Islands and future HSA architectures?
It's unclear how that extension should look like, given that DynP is quite intimately tied to NV's hardware and their particular software stack. It is also unclear if NV will expose this through OpenCL anytime soon, if ever. So AMD doesn't have the hardware to do it (but a restricted form of on-GPU scheduling may be possible, and has been talked about at AFDS this year, see:PG-4271 - Advanced Flow Control in GCN by Pierre Boudier), and it may have to fight an uphill battle against the SW, which is likely going to lead to the use of custom, proprietary and ultimately non-portable extensions.
It seems to be similiar to a host invocation code. On the other hand such OpenCL code is not tiny. That is why some simplified interfaces should be added (for example as part of SDK). DynP seems to be powerful functionality and I think that AMD should not ignore it.
What do you mean by the abbreviation "SW"?
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