Small ALU clause was generated between ALU clauses.

Discussion created by katayama on May 8, 2011
Latest reply on May 9, 2011 by katayama

When I wrote simple crypto cracker as my OpenCL training, I found very small ALU clause and some MOV instructions were genereted.

Why clause '07' was splitted from next clause ?

(I'm using -cl-opt-disable compiler option because lack of this option makes scratch register spill.)

RADEON HD 6870, Catalyst 11.4 and  APP SDK 2.4.

06 ALU: ADDR(692) CNT(127) (snip) 108 x: LSHL R0.x, PV107.z, (0x00000002, 2.802596929e-45f).x y: ADD_INT R4.y, PV107.x, PS107 z: LSHR R2.z, PV107.z, (0x00000006, 8.407790786e-45f).y w: XOR_INT R3.w, T3.y, PV107.y t: AND_INT R4.z, T3.w, (0x7F7F7F7F, 3.396151365e38f).z 07 ALU: ADDR(819) CNT(11) 109 x: MOV R0.x, R0.x z: MOV R4.z, R4.z w: MOV R3.w, R3.w t: MOV R2.z, R2.z 110 x: ADD_INT R0.x, R5.w, PV109.z y: LSHL R6.y, PV109.w, (0x00000002, 2.802596929e-45f).x z: AND_INT R4.z, PV109.x, (0xFCFCFCFC, -1.050871953e37f).y w: LSHR R3.w, PV109.w, (0x00000006, 8.407790786e-45f).z t: AND_INT R2.z, PS109, (0x03030303, 3.850089727e-37f).w 08 ALU: ADDR(830) CNT(122) 111 x: OR_INT R39.x, R4.z, R2.z y: AND_INT ____, R3.w, (0x03030303, 3.850089727e-37f).x z: ADD_INT ____, R4.y, (0x01010101, 2.369427828e-38f).y w: AND_INT ____, R6.y, (0xFCFCFCFC, -1.050871953e37f).z VEC_120 t: ADD_INT ____, R0.x, (0x01010101, 2.369427828e-38f).y