I encountered some unexpected results when using the Core::ExRetCops performance counter (PMCx0C1, counting "Retired Uops" according to the Processor Programming Reference (PPR) for AMD Family 17h Models 00h-0Fh Processors ) on my Zen+ Ryzen 5 2600X CPU.
For simple instructions that use memory, like for example "add rbx, qword ptr [rcx + 42]", this performance counter (read using nanoBench) reports one micro op.
Table 1 of the Software Optimization Guide for AMD Family 17h Processors  however states that such instructions are implemented with two micro ops, one for the addition and one for the load.
It seems that either I misunderstood the documentation, or one of the documents is wrong. It might be a hint to the culprit that this performance counter is documented to count macro-ops instead of micro ops in the Zen3 PPR .
Is this a known error in the Zen(+) PPR, and if so, is there another mechanism to count the number of issued/executed/retired micro ops?
Thank you for your help!
These type of technical threads I would suggest asking at AMD Developer's Forum where the Moderator can decide which of the various AMD Developer forums your thread is most applicable.
Start here first: https://community.amd.com/t5/newcomers-start-here/bd-p/newcomer-forum
Thanks! I will do that.
Cool, ritter2a. I am almost sure I cannot help you (know nothing about Linux) but thanks much for the links. I DLed all your links and will take a look. Enjoy, John.