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misterj
Exemplar
‎07-19-2018 10:03 AM

Re: Do Ryzen support write-back caching for Memory Mapped IO (through PCIe interface)?

WOW, gyeong9m!  Thanks much for the time you spent explaining all this.  I will spend some time and see if I can understand it.  Enjoy, John.

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misterj
Exemplar
‎07-22-2018 06:16 PM

Re: Do Ryzen support write-back caching for Memory Mapped IO (through PCIe interface)?

gyeong9m, there are lots I do not understand but I want to know what count=0 means in the MTRR?  I found this:

* Releases an MTRR region. If the usage count drops to zero the

* register is freed and the region returns to default state."

Perhaps a problem?  Enjoy, John.

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zouyu930503
Journeyman III
‎05-04-2019 04:24 PM

Re: Do Ryzen support write-back caching for Memory Mapped IO (through PCIe interface)?

Hi gyeong9m,

We are also trying to enable write-back for KC705 PCIe.

I was wondering if you have successfully enabled it? We tried some Intel CPU, but all freeze when enabling write-back.

You said it works like a write-through cache, so according to my understanding, read is successfully cached while write is not? Is that true?

Thank you very much.

Yu

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