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f_popchenko
Adept I

Disabling SMI on AMD Family 17h

Hello,
Is there a way to disable SMI on AMD Epyc?

I'm working on AMD Epyc 7301 with QNX (real-time OS) and have SMI interruptions on all CPUs every 32 ms for ~400 us. This is not what we wanted to see in real-time OS.

So, if you have any suggestions how can I disable SMIs at all, or just reduse frequency of this SMI's, please, share it with me.

Also, in SLES RT, I can see that SMI counter stand at the 0 point. And I have a question, what does Linux do to handle this SMIs? 

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1 Solution
f_popchenko
Adept I

Thank you all for replies. I've found the solution.

In case that someone face the same problem. 

There is an SMI register space describred in BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 16h Models 00h-0Fh Processors doc on p. 875. And I found SMI Enable bit in SMITRIG0 register. Setting this bit disables SMI. Also there is a possibility to disable SMI sources.

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12 Replies
misterj
Big Boss

f.popchenko, this is a User Forum primarily for desktops and I suspect there is another forum for EPYC.  Sorry, I did not even recognize the terms you are using.  I did fide this for you to look into - Performance Tuning Guidelines for Low Latency Response on AMD EPYC™-Based Servers Application Note

Hope this is a start for you.  Enjoy, John. 

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misterj, thank you for reply, but I've already read this doc and optimize my BIOS settings. But this doesn't work for me - in QNX I still catch this SMIs. I'll try to ask this on EPYCs forum.
Thank you, Filipp.

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f.popchenko, I know a little about Ryzen and Threadripper BIOSs but have never sat with an EPYC.  I guess I would look at CBS and PBS and see if either contain settings to disable SMIs.  Here are these options in my 2990WX:

pastedImage_1.bmp

pastedImage_2.bmp

pastedImage_3.bmp

I can post more if you like.  At least this may give you a place to start.  Thanks and enjoy, John.

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Need to give more information on your Sever hardware and software.  You are using a UNIX OS - QNX, correct?

Try posting your question at this AMD Forum specific for Server and EPYC issues: AMD Server Gurus‌.

You may need to be "White Listed" by AMD Moderator:  jesse_amdjesse_amd

Found this website for QNX: Help - Eclipse SDK 

Found this technical documents concerning Linux RT. Here is the Title and first Page of the Document. It is in a foreign language but then goes to English in the actual Doc.

Attached Document to this post if interested in downloading it and seeing if it answer your question.

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Yes, I'm using UNIX-like OS QNX. I already know, how SMIs works and what impact it has on real-time systems. Thats why I want to disable this interrupts. Actually, I need to know is there a way to just turn it off in the model specific registers of AMD64 architecture, or some other specific place, that I can write from OS. And I know, that there is a way to reduse SMIs influence, like it works in Linux, but I need to understand how to do this in OS QNX.

Can you tell me, where can I ask this questions to someone, who familiar with AMD64 architecture and family 17h in paticular?

Thank you for reply, 
Filipp

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AMD Server Gurus‌ would be a good place to start or Devgurus‌ that can direct you to the appropriate Forum where to post your question.  Deepak

Both Forums are excellent places for developers and programmers to post their questions.

Also open a AMD Service Request to see what they suggest: Online Service Request | AMD 

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according to the image I posted from QNX it mentions you can disable SMM in BIOS which is activated by SMI's. It also mentions to avoid using a motherboard where you can't disable SMM in BIOS.

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SMI is a BIOS function and it is not generally exposed to user actions at all

Depending on the operating system in use will determine which BIOS features are used and to what extent

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f_popchenko
Adept I

Thank you all for replies. I've found the solution.

In case that someone face the same problem. 

There is an SMI register space describred in BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 16h Models 00h-0Fh Processors doc on p. 875. And I found SMI Enable bit in SMITRIG0 register. Setting this bit disables SMI. Also there is a possibility to disable SMI sources.

I have to ask if you are working on an operating system kernel or UEFI extension?

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I'm working with QNX, its a real-time operation system.

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f.popchenko wrote:

I'm working with QNX, its a real-time operation system.

That OS is largely seen in embedded systems. Any RTS is a bit of a misnomer as there has to be some kind of task scheduling or signalling. 

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