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cguenther
Adept II

Hardware hierarchical depth test with GCN?

Dear AMD dev team,

I think that i read somewhere that the GCN architecture does a hierarchical depth test in hardware. I can't find the reference at the moment, so please correct, if my remembered false. But if its true, is the hierarchical is used also when only point primitives are rendered with OpenGL, or is at this case direct depth test is used?

It would be great if i can get a short statement of a amd developer, because i need to know this for my bachelor thesis.

with best regards,

CG

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cguenther
Adept II

I read in the GCN whitepaper the following fact about the rasterizer: "Each rasterizer can read in a single triangle per cycle, and write out 16 pixels. Afterwards, the hierarchical Z-testing will eliminate any occluded pixels prior to pixel shading."

When we render points, than we project each primitive into one pixel, which means, that the rasterizer writes out one occluded pixel per clock. When also for only one occluded pixel an hierarchical Z-test is done, than the z-test waste performance, right?

Please tell me, if the hierarchical approach is also done by the hardware, even when the rasterizer delivers only one occluded pixel.

Thanks,

Christian Günther

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